The cache coherence protocols keep track of accesses within a hardware transaction.
https://www.sciencedirect.com/topics/engineering/cache-coherence
Cache Coherence - an overview | ScienceDirect Topics
A common cache invalidation protocol is referred to as the MESI cache coherence protocol. This protocol is an invalidation-based protocol that is named after the four states that a cache block in an L1 cache can have: • Modified: When a cache block is in
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